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RT9173/A
Peak 3A Bus Termination Regulator
General Description
The RT9173/A regulator is designed to convert voltage supplies ranging from 1.6V to 6V into a desired output voltage which adjusted by two external voltage divider resistors. The regulator is capable of sourcing or sinking up to 3A of peak current while regulating an output voltage to within 2% (DDR 1) and 3% (DDR 2) or less. The RT9173/A, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. The voltage output of the regulator can be used as a termination voltage for DDR SDRAM. Current limits in both sourcing and sinking mode, plus onchip thermal shutdown make the circuit tolerant of the output fault conditions.
Features
Support Both DDR 1 (1.25VTT) and DDR 2 (0.9VTT) Requirements SOP-8, TO-252-5 and TO-263-5 Packages Capable of Sourcing and Sinking 3A Peak Current Current-limiting Protection Thermal Protection Integrated Power MOSFETs Generates Termination Voltages for SSTL-2 High Accuracy Output Voltage at Full-Load Adjustable VOUT by External Resistors Minimum External Components Shutdown for Standby or Suspend Mode Operation with High-impedance Output RoHS Compliant and 100% Lead (Pb)-Free
Applications
DDR Memory Termination Active Termination Buses Supply Splitter
Ordering Information
RT9173/A Package Type M5 : TO-263-5 L5 : TO-252-5 S : SOP-8 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) 3A Sink & Source 1.5A Sink & Source
Pin Configurations
(TOP VIEW)
5 4 3 2 1 VOUT REFEN VCNTL (TAB) GND VIN
Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100%matte tin (Sn) plating.
TO-263-5 (RT9173A)
5 4 3 2 1 VOUT REFEN VCNTL (TAB) GND VIN
TO-252-5 (RT9173A)
VIN GND REFEN VOUT 2 3 4 8 7 6 5 VCNTL VCNTL VCNTL VCNTL
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RT9173/A
Typical Application Circuit
VCNTL = 3.3V VIN = 2.5V R1 VIN VCNTL CIN CCNTL RTT
2N7002 EN R2 CSS
RT9173/A REFEN VOUT GND
COUT RDUMMY
R1 = R2 = 100k, RTT = 50 / 33 / 25 COUT(MIN) = 10F (Ceramic) + 1000F under the worst case testing condition RDUMMY = 1k as for VOUT discharge when VIN is not present but VCNTL is present CSS = 1F, CIN = 470F (Low ESR), CCNTL = 47F
Test Circuit
2.5V 3.3V
VIN 1.25V
VCNTL VOUT COUT IL
RT9173/A VOUT REFEN GND
V
Figure 1. Output Voltage Tolerance, VLOAD
3.3V 2.5V
A
VIN VCNTL V OUT C OUT 1.25V 0V
1.25V 0.2V
RT9173/A REFEN VOUT GND RL
V
R L and C OUT Time deleay
Figure 2. Current in Shutdown Mode, ISHDN
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RT9173/A
2.5V 3.3V
VIN 1.25V
VCNTL VOUT
RT9173/A REFEN VOUT GND
A
IL
COUT
V
Figure 3. Current Limit for High Side, ILIMIT
Power Supply with Current Limit 2.5V VIN 1.25V
3.3V
VCNTL
A
IL V OUT COUT
RT9173/A REFEN VOUT GND
V
Figure 4. Current Limit for Low Side, ILIMIT
3.3V 2.5V VIN 1.25V V REFEN 0.2V VCNTL V OUT C OUT
RT9173/A REFEN VOUT GND RL
V
1.25V V OUT 0V
V OUT would be low if VREFEN < 0.2V V OUT would be high if VREFEN > 0.8V R L and COUT Time deleay
Figure 5. REFEN Pin Shutdown Threshold, VTRIGGER
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RT9173/A
Functional Pin Description
Pin Name VIN GND VCNTL REFEN VOUT Ground Gate Drive Voltage Reference Voltage Input and Chip Enable Output Voltage Pin Function Power Input Voltage
Function Block Diagram
VCNTL VIN
Current Limiting Sensor REFEN Thermal GND CNTL VOUT
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Absolute Maximum Ratings
Input Voltage ------------------------------------------------------------------------------------------------------------ 7V Power Dissipation ----------------------------------------------------------------------------------------------------- Internally Limited ESD Rating ------------------------------------------------------------------------------------------------------------- 2kV Storage Temperature Range ---------------------------------------------------------------------------------------- -65C to 150C Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260C Power Dissipation, PD @ TA = 25C TO-263-5 ----------------------------------------------------------------------------------------------------------------- 1.923W TO-252-5 ----------------------------------------------------------------------------------------------------------------- 1.471W SOP-8 -------------------------------------------------------------------------------------------------------------------- 0.625W Package Thermal Resistance (Note 3) TO-263-5, JC ---------------------------------------------------------------------------------------------------------- 7.7C/W TO-252-5, JC ---------------------------------------------------------------------------------------------------------- 8C/W SOP-8, JC -------------------------------------------------------------------------------------------------------------- 23.2C /W TO-263-5,JA ------------------------------------------------------------------------------------------------------------ 52C/W TO-252-5, JA ----------------------------------------------------------------------------------------------------------- 68C/W SOP-8, JA -------------------------------------------------------------------------------------------------------------- 160C/W
Electrical Characteristics
(VIN = 2.5V, VCNTL = 3.3V, VREFEN = 1.25V, COUT = 10F (Ceramic), TA = 25C, unless otherwise specified.)
Parameter Output Offset Voltage Load Regulation (DDR 1/2) Input Voltage Range (DDR 1/2) (Note 2) Operating Current of VCNTL Current In Shutdown Mode Short Circuit Protection Current limit Over Temperature Protection
Symbol VOS VLOAD VIN VCNTL ICNTL ISHDN ILIMIT
Test Conditions IOUT = 0A, Figure 1 (Note 1) IL : 0A 1.5A, Figure 1 IL : 0A -1.5A Keep VCNTL VIN on operation power on and power off sequences No Load VREFEN < 0.2V, RL = 180, Figure 2 Figure 3,4 3.3V VCNTL 5V Guaranteed by design
Min -20 --1.6 ---3.0 125 -0.8 --
Typ 0 0.8/1.2 0.8/1.2 2.5/1.8 3.3 6.5 50 -150 50 ---
Max Units 20 2/3 2/3 -6 10 90 ----0.2 mV % V mA A A C C
Thermal Shutdown Temperature TSD Thermal Shutdown Hysteresis Shutdown Function Shutdown Threshold Trigger
VTRIGGER Output = High, Figure 5 VTRIGGER Output = Low, Figure 5
V
Note 1. VOS offset is the voltage measurement defined as VOUT subtracted from VREFEN. Note 2. For safely operate your system, the 3.3V rail MUST be tied to VCNTL rather than 5V rail, especially for the new part of RT9173ACL5. Note 3. JA is measured in the natural convection at TA = 25C on a low effective thermal conductivity test board (single Layers, 1S) of JEDEC 51-3 thermal measurement standard. The case point of JC is on the on the center of VCTRL pins (Lead 6 & 7) for SOP-8 packages, the center of heat sink (tab) for TO-252-5 and TO-263-5 packages. DS9173/A-18 March 2007 www.richtek.com 5
RT9173/A
Typical Operating Characteristics
Sourcing Current (Peak) vs. Temperature
8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -40 -20 0 20 40 60 80 100 120
8.0 7.0
Sinking Current (Peak) vs. Temperature
Sinking Current (A) A
Sourcing Current (A)
6.0 5.0 4.0 3.0 2.0 1.0 0.0 -40 -20 0 20 40 60 80 100 120
VCNTL = 3.3V VIN = 2.5V VOUT = 1.25V
VCNTL = 3.3V VIN = 2.5V VOUT = 1.25V
Temperature (C)
Temperature (C)
Turn-On Threshold vs. Temperature
700 650 600 550 500 450 400 -40 -20 0 20 40 60 80 100 120
700 650 600 550 500 450 400
Turn-On Threshold vs. Temperature
Threshold Voltage (mV)
VCNTL = 3.3V VIN = 2.5V
Threshold Voltage (mV)
VCNTL = 5.0V VIN = 2.5V
-40 -20 0 20 40 60 80 100 120
Temperature (C)
Temperature (C)
1.25VTT @ 1.5A Transient Response
Output Transient Voltage (mV)
50 0 -50 2 1 0 -1 -2 VIN = 2.5V VREFEN = VCNTL = 3.3V Swing Frequency = 1KHz
1.25VTT @ 3A Transient Response
Output Transient Voltage (mV)
100 50 0 -50 4 2 0 -2 -4 VIN = 2.5V VREFEN = VCNTL = 3.3V Swing Frequency = 1KHz
100

Output Current (A)
Time (250us/Div)
Output Current (A)
Time (250us/Div)
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RT9173/A
0.9VTT @ 1.5A Transient Response
Output Transient Voltage (mV)
50 0 -50 2 1 0 -1 -2 VIN = 1.8V VREFEN = 0.9V VCNTL = 3.3V Swing Frequency = 1KHz
0.9VTT @ 3A Transient Response
Output Transient Voltage (mV)
100 50 0 -50 4 2 0 -2 -4 VIN = 1.8V VREFEN = 0.9V VCNTL = 3.3V Swing Frequency = 1KHz
100

Output Current (A)
Time (250us/Div)
Output Current (A)
Time (250us/Div)
RDS(ON) vs. Temperature
0.31 0.30 0.29
RDS(ON) vs. Temperature
0.32 0.31 0.30
VIN = 0.9V VIN = 0.85V
VIN = 0.9V
R DS(ON) ()
R DS(ON) ()
0.28 0.27 0.26 0.25 0.24 0.23 0.22 25 35 45 55 65 75 85
0.29 0.28 0.27 0.26 0.25
VIN = 0.85V
VIN = 0.8V
VIN = 0.8V
VCNTL = 3.3V VREFEN = 1.0V
95 105 115 125
0.24 0.23 25 35 45 55 65 75 85
VCNTL = 5.0V VREFEN = 1.0V
95 105 115 125
Temperature (C)
Temperature (C)
Output Short-Circuit Protection
12 10 Sink VIN = 2.5V VCNTL = 3.3V VREFEN = 1.25V 12 10
Output Short-Circuit Protection
Source VIN = 2.5V VCNTL = 3.3V VREFEN = 1.25V
Output Short Circuit (A)
8 6 4 2 0 -2 -4 Force the output shorted to VDDQ
Output Short Circuit (A)
8 6 4 2 0 -2 -4 Force the output shorted to ground
Time (5ms/Div)
Time (5ms/Div)
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RT9173/A
Application Information
Internal Parasitic Diode Avoid forward-bias internal parasitic diode, VOUT to VCNTL, and VOUT to VIN, the VOUT should not be forced some voltage respect to ground on this pin while the VCNTL or VIN is disappeared. Consideration while Designs the Resistance of Voltage Divider Make sure the sinking current capability of pull-down NMOS if the lower resistance was chosen so that the voltage on VREFEN is below 0.2V. In addition, the capacitor and voltage divider form the lowpass filter. There are two reasons doing this design; one is for output voltage soft-start while another is for noise immunity. How to reduce power dissipation on Notebook PC or the dual channel DDR SDRAM application? In notebook application, using RichTek's Patent "Distributed Bus Terminator Topology" with choosing RichTek's product is encouraged.
Distributed Bus Terminating Topology
Terminator Resistor R0 R1 BUS(1) RT9173/A VOUT R2 R3 R4 REFEN R5 R6 BUS(6) RT9173/A VOUT R7 R8 R9 BUS(7) BUS(8) BUS(9) BUS(2) BUS(3) BUS(4) BUS(5)
Thermal Consideration RT9173/A regulators have internal thermal limiting circuitry designed to protect the device during overload conditions. For continued operation, do not exceed absolute maximum operation junction temperature 125C. The power dissipation definition in device is : PD = (VIN - VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) -TA ) /JA Where T J(MAX) is the maximum operation junction temperature 125C, TA is the ambient temperature and the JA is the junction to ambient thermal resistance. The junction to ambient thermal resistance JA highly depends on IC package, PCB layout, and the rate of surroundings airflow. JA for SOP-8 package is 160C/W and TO-263-5 package is 52C/W on standard JEDEC 51-3 (single layer, 1S) thermal test board. The maximum power dissipation at TA = 25C can be calculated by following formula : PD(MAX) = (125C - 25C) / (160 C/W)= 0.625W (SOP-8 package) PD(MAX) = (125C- 25C) / (52 C/W)= 1.923W (TO- 2635 package ) Since the multiple VCTRL pins of the SOP-8 package are internally fused and connected to lead frame, it is efficient to dissipate the heat by adding cooper area on VCTRL footprint. Figure 7 shows the package sectional drawing of SOP-8. Every package has several thermal dissipation paths, as show in Figure 8, the thermal resistance equivalent circuit of SOP-8. The path 2 is the main path of thermal flow due to these materials thermal conductivity. We define the center of multiple VCTRL pins are the case point of the path 2.
BUS(0)
RN RN+1
BUS(N) BUS(N+1)
Figure 6
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RT9173/A
Molding Compound Lead Frame
JA vs. Copper Area
100 90
Die
Case Point
80
JA (C/W)
70 60 50 40
Die Pad
Ambient Molding Compound Gold Wire Die Pad
Lead Frame
30 0
SOP-8 2S2P thermal test board
10 20 30 40 50 60 70
2
80
90
100
Copper Area (mm )
Figure 7. The Package Section Drawing of RT9173/A SOP-8 Package The thermal resistance JA of IC package is determined by the package design and the PCB design. However, the package design has been decided. If possible, it's useful to increase thermal performance by the PCB design. The thermal resistance can be decreased efficiently by adding copper under the main path of thermal flow on the package. The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance JA. For RT9173/A package, the Figure 9 and the Figure 10 show the thermal resistance JA vs. copper area of SOP-8 and TO-263-5 packages on single layer (1S) and 4-layer (2S2P) thermal test board at TA = 25C, PCB copper thickness = 2oz.
Figure 9. Thermal Resistance JA vs. Copper Area of SOP-8 Packages
Thermal Resistance vs. Cooper Area
70 60 50 40
Thermal Resistance (C/W)
1S thermal test board
2S2P thermal test board
30 20 10
TO-263-5
0 0 50 100 150 200 250
2
300
350
400
Cooper Area (mm )
Figure 10. Thermal Resistance JA vs. Copper Area of TO-263-5 Packages For example, as shown in Figure 9, RT9173/A SOP-8 with 10mm x 10mm cooper area on 4-layers (2S2P) thermal test board at TA = 25C, we can obtain the lower thermal resistance about 45C/W. The power maximum dissipation can be calculated as : PD(MAX) = (125C - 25C) / (45 C/W) = 2.22W (SOP-8) As shown in Figure 10, RT9173/A TO-263-5 with 15mm x 15mm cooper area on 4-layers (2S2P) thermal test board at TA = 25C, we can obtain the lower thermal resistance about 29C/W. The power maximum dissipation
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RGOLD-LINE path 1 RDIE
RLEAD FRAME
RPCB
Internally Fused RPCB Ambient
Junction
RDIE-ATTACH RDIE-PAD RLEAD FRAME path 2
RMOLDING-COMPOUND path 3
Figure 8. Thermal Resistance Equivalent Circuit of RT9173/A SOP-8 Package
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RT9173/A
can be calculated as : PD(MAX) = (125C - 25C) / (29C/W) = 3.45W (TO-263-5) Figure 11 and Figure 12 of power dissipation vs. copper area allow the designer to see the effect of rising ambient temperature on the maximum power allowed.
Power Dissipation vs. Copper Area
100 90
2S2P thermal test board TA = 65C TA = 55C
Copper Area (mm )
80 70 60 50 40 30 20 10 0 0 0.5 1 1.5 2 2.5 3
2
TA = 25C
SOP-8
Power Dissipation (W)
Figure 11. Power Dissipation vs. Copper Area of SOP-8 Package
Cooper Area vs. Power Dissipation
400 350
2S2P thermal test board
Cooper Area (mm )
300 250 200 150 100 50 0 0 0.5 1 1.5 2 2.5 3
2
TA = 65C
TA = 55C
TA = 25C TO-263-5
3.5 4 4.5
Power Dissipation (W)
Figure 12. Power Dissipation vs. Copper Area of TO-263-5 Package
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Outline Dimension
D B C U
V E L1
L2 e b b2
A
Symbol D B E A C U V L1 L2 b b2 e
Dimensions In Millimeters Min 9.652 1.143 8.128 4.064 1.143 Max 10.668 1.676 9.652 4.826 1.397
Dimensions In Inches Min 0.380 0.045 0.320 0.160 0.045 Max 0.420 0.066 0.380 0.190 0.055
6.223 Ref. 7.620 Ref. 14.605 2.286 0.660 0.305 1.524 15.875 2.794 0.914 0.584 1.829
0.245 Ref. 0.300 Ref. 0.575 0.090 0.026 0.012 0.060 0.625 0.110 0.036 0.023 0.072
5-Lead TO-263 Plastic Surface Mount Package
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RT9173/A
E b3 L3 T V D H S C2 R
L b P L2
A
Symbol A b b3 C2 D E H L L2 L3 P V R S T
Dimensions In Millimeters Min 2.184 0.381 4.953 0.457 5.334 6.350 9.000 0.508 0.889 Max 2.388 0.889 5.461 0.889 6.223 6.731 10.414 1.780 2.032
Dimensions In Inches Min 0.086 0.015 0.195 0.018 0.210 0.250 0.354 0.020 Max 0.094 0.035 0.215 0.035 0.245 0.265 0.410 0.070
0.508 Ref. 1.270 Ref. 5.200 Ref. 0.200 2.500 0.500 1.500 3.400 0.850
0.020 Ref. 0.035 0.080
0.050 Ref. 0.205 Ref. 0.008 0.098 0.020 0.059 0.134 0.033
5-Lead TO-252 Surface Mount Package
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RT9173/A
A
H M
J
B
F
C I D
Symbol A B C D F H I J M
Dimensions In Millimeters Min 4.801 3.810 1.346 0.330 1.194 0.170 0.050 5.791 0.400 Max 5.004 3.988 1.753 0.508 1.346 0.254 0.254 6.200 1.270
Dimensions In Inches Min 0.189 0.150 0.053 0.013 0.047 0.007 0.002 0.228 0.016 Max 0.197 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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